Parallel Processing MCQ (Part-2)
Parallel Processing MCQ (Part-1)
Parallel Processing MCQ, Objective Questions on Parallel Processing, Multiple Choice Questions on Parallel Processing, GATE Questions on Parallel Processing, Parallel Processing MCQ with answers
Multiple Choice Questions
Q.1. A program segment chosen for parallel processing is known as:
- Grain
- Cluster
- Work station
- None of the above
Answer: Grain
Q.2. A compiler that automatically detects the parallelisms is known as:
- Optimizing compiler
- Run-time compiler
- Interpreter
- None of the above
Answer: Optimizing compiler
Q.3. A loop level parallelism has a grain size of:
- 20
- 200
- 500
- None of the above
Answer: 500
Q.4. Demand driven computers are also known as:
- Control flow computer
- DFC
- Reduction computers
- None of the above
Answer: Reduction computers
Q.5. Pentium-IV works on:
- Control flow mechanism
- Data flow mechanism
- Demand-driven mechanism
- All of the above
Answer: Control flow mechanism
Q. 6. Static data flow computer (SDFC) was given by:
- Dennis
- Bernstein
- Albrecht
- None of the above
Answer: Dennis
Q. 7. Pipelining uses:
- data parallelism
- temporal parallelism
- spatial parallelism
- None of the above
Answer: temporal parallelism
Q.8. Scalar pipelines are under:
- Software control
- Hardware control
- Firmware control
- None of the above
Answer: Software control
Q.9. The utilization pattern of successive stage in the pipeline is
- Space-time diagram
- Reservation table
- Both the above
- None of the above
Answer: Both the above
Q.10. Latency values must:
- Negative
- Positive
- Either Negative and Positive
- None of the above
Answer: Positive
Q.11. Forbidden latency means:
- Distance between any two checkmarks in the same row of the reservation table
- Distance between any two checkmarks in the same column of the reservation table
- Distance between all the checkmarks
- None of the above
Answer: Distance between any two checkmarks in the same row of the reservation table
Q.12. The average latency of a constant cycle is:
- Constant
- Latency itself
- Not Known
- None of the above
Answer: Latency itself
Q. 13. CPA stands for:
- Carry power adder
- Carry storage adder
- Carry simple adder
- None of the above
Answer: Carry simple adder
Q.14. CSA stands for.
- Carry save adder
- Carry storage adder
- Carry simple adder
- None of the above
Answer: Carry save adder
Q.15. A separate register that has one bit to identify each register of the register file is called as a
- Blackboard
- Whiteboard
- Scoreboard
- None of the above
Answer: Scoreboard
Q.16. Loop scheduling includes:
- Loop unrolling
- Software Pipelining
- Both
- None of the above
Answer: Both
Q.17. In out-of-order execution, the task are:
- in different order
- in same order
- no order
- None of the above
Answer: in different order
Q.18. A possible execution path within a loop is known as:
- Control path
- Flow path
- Trace
- None of the above
Answer: Trace
Q.19. During loop scheduling, when the loop size is large, the relative gain is:
- Large
- Less
- No change
- None of the above
Answer: Less
Q.20. Real pipelines are:
- Linear
- Non-Linear
- Exponential
- None of the above
Answer: Non-Linear
Q.21. CISC stands for:
- Compound Instruction Symbolic Computer
- Complex Instruction Set Computer
- Common Idea Set Computer
- None of the above
Answer: Complex Instruction Set Computer
Q.22. CISC microprocessors have:
- Complex machine instruction
- Best addressing capability
- Both the above
- None of the above
Answer: Both the above
Q.23. A system in which one instruction is issued per cycle:
- Base Scalar processor
- Super Scalar
- Vector
- None of the above
Answer: Base Scalar processor
Q.24. For an ideal pipeline, effective CPI is:
- 1
- 2
- 3
- 4
Answer: 1
Q.25. RISC stand for:
- Remote Instruction Set Computer
- Reduced Instruction Set Computer
- Ram Instruction Set Computer
- None of the above
Answer: Reduced Instruction Set Computer
Q.26. 8086/186/286/386 are examples of:
- Vectors
- RISC
- CISC
- None of the above
Answer: CISC
Q.27. RISC has:
- Unified cache
- I and D cache
- L1 cache
- None of the above
Answer: I and D cache
Q.28. Pentium employs a:
- BTB
- PSP
- ASP
- DSP
Answer: BTB
Q.29. A pure CISC processor is:
- 186
- 286
- 386
- 486
Answer: 386
Q.30. More RAM is required in:
- CISC
- RISC
- Vectors
- None of the above
Answer: RISC