Programmable Logic Devices MCQ
Programmable Logic Devices MCQ, MCQ on Programmable Logic Devices, Programmable Logic Device MCQ, PLD MCQ, Multiple Choice Questions on PLD, Objective Questions on Programmable Logic Devices, Digital Electronics MCQ, Engineering MCQ, ROM MCQ, PROM MCQ
Objective Type Questions
Q.1. A ROM which can be programmed is called a
- MROM
- PROM
- EPROM
- EEPROM
Answer: PROM
Q.2. A 32 x 10 ROM contains a decoder of size
- 5 x 32
- 32 x 32
- 32 x 10
- 10 x32
Answer: 5 x 32
Q.3. An 8 x 4 ROM contains a decoder of size
- 3 x 8
- 8 x 4
- 8 x8
- 3 x 4
Answer: 3 x 8
Q.4. A 16 x 5 ROM stores
- 4 words of 16 bits each
- 16 words of 5 bits each
- 16 words of 4 bits each
- 5 words of 16 bits each
Answer: 16 words of 5 bits each
Q.5. The ROM programmed during the manufacturing process itself is called
- MROM
- PROM
- EPROM
- EEPROM
Answer: MROM
Q.6. A field-programmable ROM is called
- MROM
- PROM
- FROM
- FPROM
Answer: PROM
Q.7. A ROM whose contents can be selectively erased is
- an MROM
- a PROM
- an EPROM
- an EEPROM
Answer: an EEPROM
Q.8. A combinational PLD with a fixed AND array and a programmable OR array is called
- PLD
- PROM
- PAL
- PLA
Answer: PROM
Q.9. A combinational PLD with a programmable AND array and a fixed OR array is called a
- PLD
- PROM
- PAL
- PLA
Answer: PAL
Q.10. A combinational PLD with a programmable AND array and a programmable OR array is called a
- PLD
- PROM
- PAL
- PLA
Answer: PLA
Q.11. A table specifying the fuse map of a PLA is called a
- fuse table
- fuse map table
- programming table
- PLA table
Answer: programming table
Q.12. A ROM of size M x N bits can store
- N words of M bits each
- M words of N bits each
- M bits
- N bits
Answer: M words of N bits each
Q.13. The address bus with a ROM of size 1024 x 8 bits is
- 8 bits
- 10 bits
- 12 bits
- 16 bits
Answer: 10 bits
Q.14. The decimal equivalent of the highest possible address for an 8-bit address bus is
- 8
- 128
- 255
- 256
Answer: 255
Q.15. The data bus width of a ROM of size 2048 x 8 bits is
- 8
- 10
- 12
- 16
Answer: 8
Q.16. A ROM has a 16-bit address bus. The number of locations in this memory is
- 16
- 32
- 1024
- 65536
Answer: 65536
Q.17. It is desired to have a 64 x 8 ROM. The ROMs available are of 16 x 4 size. The number of ROMs required will be
- 8
- 6
- 4
- 2
Answer:
Q.18. Four ROM chips of 16 x 4 size have their address buses connected together. This system will be of size
- 64 x 4
- 16 x 16
- 32 x 8
- 256 x 1
Answer: 16 x 16
Q.19. In a read-only memory, information can be stored
- at the time of fabrication
- by the user only once during its life time
- by the user a number of times
- in any of the above ways depending upon the type of memory
Answer: by the user only once during its lifetime
Q.20. A read-only memory in which the present contents must be erased before the new information can be stored is
- ROM
- PROM
- EAROM
- All of the above
Answer: EAROM
Q.21. A read-only memory in which the contents get erased when power failure occurs is
- EAROM
- PROM
- ROM
- none of these
Answer: none of these
Q.22. An EPROM
- is of random-access type
- is non volatile
- is programmable
- has all of the above requirements
Answer: has all of the above requirements
Q.23. A mask programmed ROM is
- programmed at the time of fabrication
- programmed by the user
- erasable and programmable
- erasable electrically
Answer: programmed at the time of fabrication
Q.24. A PROM
- is mask programmed
- is erasable by ultraviolet light
- can be programmed only once
- can be programmed any number of times
Answer: can be programmed only once
Q.25. The process of entering information in EPROM is commonly known as
- writing
- programming
- storing
- none of the above
Answer: programming
Q.26. The term ‘programming’ as used in connection with EPROMs is
- the same as that used for computers
- the same as that used for microcomputers
- the same as that used for µP based systems
- none of the above
Answer: none of the above
Q.27. An EPROM is
- non erasable
- volatile
- programmable and erasable
- erasable but not programmable
Answer: programmable and erasable
Q.28. An EPROM is fabricated using
- TTL bipolar technology
- MOS technology
- ECL bipolar technology
- I2L bipolar technology
Answer: MOS technology
Q.29. A function table is required in very large numbers. The memory most suitable for this purpose would be
- ROM
- PROM
- EPROM
- EAROM
Answer: ROM
Q.30. When the power supply of a ROM is switched off, its contents
- become all zeros
- become all ones
- remain intact
- are unpredictable
Answer: remain intact
Q.31. A PLA is
- mask programmable
- field programmable
- can be programmed by a user
- can be erased and programmed
Answer: mask programmable
Q.32. A FPLA can
- not be programmed by a user
- can be programmed by a user only once
- can be erased by a user
- can be programmed any number of times by a user
Answer: can be programmed by a user only once
Q.33. The capacity of a PLA is specified in terms of the
- number of inputs only
- number of outputs only
- number of inputs and outputs only
- number of inputs, product terms and outputs
Answer: number of inputs, product terms, and outputs
Q.34. A PLA is
- an LSI device
- an MSI device
- an SSI device
- a discrete device
Answer: an LSI device
Q.35. A PLA consists of
- AND matrix
- OR matrix
- Invert/non-invert matrix
- all of the above
Answer: all of the above
Q.36. The fusible link is associated
- EAROM
- ROM
- PROM
- EPROM
Answer: PROM
Q.37. For designing a 4-variable combinational circuit, a designer must use a
- ROM with at least 16 locations
- PLA with at least 32 product terms
- PLA with at least 16 product terms
- PAL with at least 16 product terms and 16 input OR gate
Answer: ROM with at least 16 locations
Q.38. A single literal term in an SOP expression
- requires an inverter for PLA implementation
- requires an AND gate for PLA implementation
- does not require an AND gate for PLA implementation
- requires an inverter for PAL implementation
Answer: requires an AND gate for PLA implementation
Q.39. For the PAL design of a logic circuit, a single literal term
- requires an AND gate
- does not require an AND gate
- requires an AND gate and one input for OR gate
- requires an inverter
Answer: requires an AND gate and one input for OR gate